7月4日 计算机体系结构和高性能计算基础#
Overview#
- ISA and x86 Instructions
- Processor Architecture
- Memory Hierarchy
- Concurrency Basic
Prerequisite Checklist#
- Digital representation of values
- Memory & Address
- C code
ISA & x86 instruction#
- ISA: instruction ser architecture.
- Assembly Language
Processor Architecture#
- Microarchitecture is implementation.(could make faster)
- thread(线程)
- fetch -> Decode -> Execute -> Commit
- Data hazards: You haven't already written but the next process need to call the data.
- control hazard: parallel processing could make a fault.
- structure hazard : like fetch and execute could make conflict.
- SRAM & DRAM:SRAM = cache(高缓冲).
Memory Layout#
- Stack: Runtime stack (8MB limit) local variables.
- Heap: Dynamically allocated as needed.
- Data: statically allocated data.
- virtual memory: OS utilizes virtual memory to isolate address space of different processes and provide each process the same linear address space(线性映射,类似于哈希)
- Translation Lookaside buffer(TLB) -> could accelerate the virtual memory and physical memory interactive.
- NVM: between SSD and SRAM.
- Cache Organization(valid bit; dirty bit ; Tag: check if matching)
- Cache usage : Read hit ; Read miss ; Write hit(write-back); Write miss(write-allocate)
- Multiple Cache Hierarchy。(L1 L2 L3)
- Processes vs. Threads.
differences: Threads in one process share memory but processes not.
x86 microarchitecture#
Last update:
2023年9月27日 10:52:36
Created: 2023年7月6日 23:32:03
Created: 2023年7月6日 23:32:03